Der Blätterkatalog benötigt Javascript.
Bitte aktivieren Sie Javascript in Ihren Browser-Einstellungen.
The Blätterkatalog requires Javascript.
Please activate Javascript in your browser settings.
Data centers faster transient load requirements without having to resort to too many capacitors Furthermore we need to cope with higher power levels in the server power supply units To achieve the power density necessary – and we have already been able to achieve more than 300 Win3 for isolating DC DC stages operating on 400V – means using wide bandgap devices typically silicon carbide in the AC DC stage and gallium nitride in the DC DC power conversion stages What do you see as the challenges and opportunities for the power needs of the newest generations of graphic and tensor processing units? Infineon’s approach to powering the processor itself combines power stages with inductors to create a voltage regulator module VRM that can be mounted on the rear of the processor making it possible to provide the necessary power at the point of load This vertical integration is important in minimizing the losses that the lateral distribution at these kinds of current – with transient loads up to 1000 A – would entail It also enables the best possible use of the constrained motherboard area Because the real challenge is the current demand transinductor coupled voltage regulators TLVRs are a good path forward combining all of the output inductors of a multiphase buck converter into one system If one phase fires it increases the output in all the phases connected to the loop enabling the fast transient response necessary It’s worth noting that there has been a significant change in voltage levels here too Most processors now have a silicon capacitor layer directly on the processor typically removing the transient requirements beyond a 5 to 8 MHz bandwidth This means the processor can operate in a lower voltage band there is less need to have an overvoltage reserve to avoid breaching the undervoltage lockout limit of the processor Being able to lower this band has the benefit of reducing the losses in the processor Because these scale at the square of the voltage going from for example 0 8 to 0 7 Vreduces losses by a factor of 82 to 72 which is around a 25% saving This is a useful additional budget that can be redeployed to overclock the processor What would you see as the next developments in the power supply of processors and for data centers? Of course the new possibilities in powering the processors has had to be reflected in processor and motherboard design Instead of logic and power lines sitting on top of each other the logic cell can now be separated on the top of the processor with the power lines on the underside where it can connect to the VRM The next challenge is the increasing of power ratings for the power supply units from 3 to 5 and to 8 kW and for racks where 40 kW is already typical though this can extend beyond 100 kW This is driving the need to migrate from singleto threephase power supply units And then further out distributing plus and minus 400 VDC instead of AC But this is further out as we are working through some complications You need circuit breakers on several levels to be able to isolate single failures These are interesting challenges and Iam sure we will arrive at interesting solutions Dr Gerald Deboy presents his keynote address on “Challenges and Solutions to Power Latest Processor Generations for Hyper Scale Datacenters” on 13 June 2024 8 45 a m stage Brüssel 1 Infineon dualphase power modules specifically designed to meet the needs of GPUs and TPUs for vertical integration at the point of load minimising distribution losses and providing high speed transition responses Training AI in hyperscale data centres presents new challenges not just for processing but also the power supply to the rack the motherboard and the processor Im ag e In fin eo n Te ch no lo gi es Aus tr ia A G 7 PCIM Magazine 01 2024