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Embedded Systems International 2020 Elektronik 9 was reduced from 32 to 16 lessening the complexity of the CPU somewhat and making it smaller That may be good for extreme cases where the CPU only plays a very simple role or for softcores in an FPGA But the primary objective of reducing code isnt achieved because the instructions are the same and the unused part of the instruction space because bit 4 of the register selection is now no longer needed is left open to implement custom instructions The specification 4 3 RV32E Instruction Set says RV32E uses the same instruction set coding as RV32I with the exception that only registers x0x15 are available Future standard addons will not use the instruction bits freed by the reduced register specification fields making these available for custom addons So is RV32E an option for embedded systems? Probably not because neither the number of instructions nor code density is improved Since the number of registers is reduced and the instruction coding remains the same its even likely that more code is needed COMPRESSION THE C-EXTENSION The compression addon uses part of the unused instruction space to obtain compressed versions i e 2 instead of 4 bytes of frequently used instructions Thats a similar idea to adding Thumb instructions to the ARM instruction set It helps to reduce code size but since it doesnt also reduce the number of instructions the resulting code is still substantially larger than Thumb-2 code CONCLUSION RV32 is a great processor with great potential especially because its open and free But sadly the design is based on a 30-yearold scheme calling for too many instructions Thats a problem on every system both on small embedded CPUs and on large 64-bit systems The size of the code isnt that important on large systems but the number of instructions makes it more difficult to execute the code fast and efficiently for minimal energy consumption The compression extension may enable the use of 2-byte instructions in many cases and improve code density but its still far behind Thumb-2 from ARM For the future it can attain the same or at least a similar level to Thumb-2 by introducing instructions small 2-byte as shown above a flag register and the like So to generate code smaller than Thumb-2 it would take a RISC-6 architecture Until we have that the situation stays the same RISC-Vis only very limited in its suitability for memorysensitive embedded systems ARM will be glad to hear that FR Note The author used the Embedded Studio development environment of the Segger company to generate the code examples 10-12 Nov 2020 The Future of Wireless the motto of the panel discussion with keynote speakers at the Wireless Congress Systems & Applications is also the motto of the entire congress program Not only in the lectures in the Technology Industrial and Compliance sessions will speakers address topics that will be of decisive importance for future wireless applications Experience the Event live and interactive via Internet on 10-12 November 2020 and register now! Keynotes Demands and Requirements in Fire Protection and Security Techniques for Wireless Communication Günter Grundmann VdS Schadenverhuetung A Roadmap for 5G Implementation in the Industrial Market Joseph Barry Analog Devices 5G Goes Industry 4 0 Dr Josef Blanz Qualcomm CDMA Technologies GmbH Semiconductor Components for Terahertz Electronics Prof Dr Nils Weimann University of Duisburg-Essen UDE 6 reasons to take part! ■ Explore the latest innovations with immediate access to supplier experts in live video sessions and get your questions answered ■ Interact with speakers in the session panels after the sessions ■ Connect directly with other attendees speakers and exhibitors ■ Schedule meetings engage in chats and attend networking events ■ No travel expenses! Attend from the comfort of your home or offi ce as if you were there ■ All lectures will be recorded and can be rewatched afterwards for 2 weeks Event Organizers www wirelesscongress com virtual Event